Abstract
Microprocessor Relay System Stability
By J.E. Mack, Engineering and Patents
As protection engineers we concern ourselves with the stability of the power system. An important and perhaps unstudied part of that is the stability of relaying systems that are the brains of the power system. An unstable relaying system can quickly cause stress and instability in an otherwise conservatively loaded, unstressed power system.
Microprocessor relay complexity has grown over the last 30 years due to demands from end users that they perform more functions and be high speed networked. Processors are larger, run faster, and memory has grown into gigabytes. Programming code has grown from thousands of lines in the beginning to a million lines or more now. This growth must be managed to provide a stable and reliable relaying system.
Examples of unstable relay systems are systems in which:
*_Temporary single bit memory errors can cause shutdown, cold boot, or incorrect tripping.
*_Problems with the communications section of the relay, cause entire relay shutdown or misbehavior of the protection section.
*_Any relay algorithms in the relay system experience system conditions beyond their design expectation.
*_General coding errors cause overflow, divide by zero, branch errors, and many others.
*_Others we don’t yet know about
Simply using 2 relays does not address many of these issues. Advance techniques must be applied similarly to those used in aviation, nuclear, military systems and backbone communication networks. Our power system deserve no less attention.
This paper will examine the most common causes of relay instability and suggest improvements based upon modern fault tolerant, failure oblivious and other techniques. Suggestions will also be given to add reliability and security by providing programming examples in relay user logic familiar to most protection engineers.